L1-NUCA: A Low Latency and Non-uniform L1 Cache Architecture Based on Single-Cycle Ring in CMP
碩士 === 國立中正大學 === 資訊工程所 === 97 === As the number of cores in a chip is increased, several new designs of memory system have been created. Based on Single-Cycle Ring interconnection offers several advantages for hierarchical clustering in future many-core systems, in terms of cost, latency, and power...
Main Authors: | , |
---|---|
Other Authors: | |
Format: | Others |
Language: | en_US |
Published: |
2009
|
Online Access: | http://ndltd.ncl.edu.tw/handle/26466218594495388020 |