NOR-type logic Content-Addressable Memory circuit of two segment matchline schem
碩士 === 國立臺灣大學 === 電機工程學研究所 === 96 === The design of the Low power VLSI circuit is one of the most important issues at the present time technology. In the chip, with ever increasing complexity of VLSI design and transistors, the power saving becomes the noteworthy challenge. In order to solve the pro...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2008
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| Online Access: | http://ndltd.ncl.edu.tw/handle/49854084304074182006 |