Simulation of SiGe Stacked in Tunneling Layer and Charge Distribution of High-K Charge Trapping Layer in Charge-Trap Flash Device
碩士 === 國立清華大學 === 工程與系統科學系 === 96 ===
Main Authors: | , |
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Other Authors: | |
Format: | Others |
Language: | zh-TW |
Published: |
2008
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Online Access: | http://ndltd.ncl.edu.tw/handle/17581422419216505974 |