Design of the Debugging Infrastructure for the Embedded DSP Core

碩士 === 國立清華大學 === 資訊工程學系 === 96 === In my thesis, we present a scalable DSP (Digital Signal Processor) subsystem and its debugging infrastructure framework. Our proposed framework has been ported to a low-power embedded DSP core, called Starfish, developed by National Tsing-Hua University and Nation...

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Bibliographic Details
Main Authors: Ming-Chang Hsieh, 謝銘昌
Other Authors: Chih-Tsun Huang
Format: Others
Language:en_US
Published: 2007
Online Access:http://ndltd.ncl.edu.tw/handle/32761296537098876461