以分子束磊晶成長氧化鋁/氧化鎵(氧化釓)/砷化銦鎵/砷化鎵金氧半電容之氧化層微縮特性研究與以原子層沉積術成長氧化鋁/砷化銦鎵/砷化鎵金氧半場效電晶體之製程與特性研究

碩士 === 國立清華大學 === 材料科學工程學系 === 96 === Part (I): Oxide Scalability An equivalent oxide thickness about 1 nm for molecular beam epitaxy (MBE)-grown Ga2O3(Gd2O3) (GGO) on In0.2Ga0.8As has been achieved by employing a thin in situ deposited 3 nm thick Al2O3 protection layer. The novel hetero-structures...

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Main Authors: Kuen-Hao Shiu, 徐堃豪
Other Authors: Ming-Hwei Hong
Format: Others
Language:en_US
Online Access:http://ndltd.ncl.edu.tw/handle/10653664748931297197
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spelling ndltd-TW-096NTHU51591082015-11-27T04:04:17Z http://ndltd.ncl.edu.tw/handle/10653664748931297197 以分子束磊晶成長氧化鋁/氧化鎵(氧化釓)/砷化銦鎵/砷化鎵金氧半電容之氧化層微縮特性研究與以原子層沉積術成長氧化鋁/砷化銦鎵/砷化鎵金氧半場效電晶體之製程與特性研究 OxideScalabilityCharacteristicsinMBEgrownAl2O3/Ga2O3(Gd2O3)/In0.2Ga0.8As/GaAsMOSCapacitorsandALD-Al2O3/In0.2Ga0.8As/GaAsMOSFET:ALDGrowth,Processing,andCharacteristics Kuen-Hao Shiu 徐堃豪 碩士 國立清華大學 材料科學工程學系 96 Part (I): Oxide Scalability An equivalent oxide thickness about 1 nm for molecular beam epitaxy (MBE)-grown Ga2O3(Gd2O3) (GGO) on In0.2Ga0.8As has been achieved by employing a thin in situ deposited 3 nm thick Al2O3 protection layer. The novel hetero-structures are robust electrically and structurally with rapid thermal annealing (RTA) to high temperatures of 800-850°C under N2 flow. Furthermore, the dual gate oxide stacks of the Al2O3/GGO (33, 20, 10, 8.5, and 4.5 nm)/In0.2Ga0.8As/GaAs metal-oxide-semiconductor (MOS) capacitors remain amorphous after RTA up to 800-850°C, accompanied with atomically sharp smooth oxide/semiconductor interfaces and fully strained In0.2Ga0.8As/GaAs interface without lattice relaxation. Well behaved capacitance-voltage (C-V) curves of the MOS diodes have shown sharp transition from depletion to accumulation with small flatband voltage (1.1 V for Au metal gate and 0.1 V for Al), weak frequency dispersion (1.5%–5.4%) between 10 and 500 kHz at accumulation capacitance, and small hysteresis (116-170 mV) at half accumulation capacitance of 100 kHz. The observed inversion formation in the C-V characteristics under light illumination or quasi-static mode explicitly confirmed that the Fermi level is effectively unpinned by the GGO passivation approach. Low leakage current densities (3.1×10−5 and (10−8-10−9) A/cm2 at V=Vfb+1 V for Al2O3(3 nm)/GGO(4.5 and ≧8.5 nm), a high dielectric constant around 14-16 of GGO for all tested thicknesses, and a low interfacial density of states (Dit) in the low 1011 cm−2 eV−1 have also been accomplished. Keywords: molecular beam epitaxy, high-�� gate dielectric, III-V, MOS, oxide scaling, Ga2O3(Gd2O3), Al2O3, InGaAs, RTA. Part (II): GaAs-based MOSFET Well-behaved electrical characteristics of D-mode n-channel In0.2GaA0.8/GaAs MOSFETs with 4.5 nm thick atomic layer deposition (ALD)-grown Al2O3 as gate dielectric by using ring-gate process have been demonstrated, achieving a drain current of 33 mA/mm (at Vg=2.5V and Vd=3V), and a transconductance of 16 mS/mm (at Vg=-0.2V and Vd=2.5V) with a 8 �慆-gate-length and a 200 �慆-gate-width. TiN and Au/Ti were chosen as metal gates during device fabrication due to the suitable thermal stability and workfunction respectively. This demonstration also successfully extends our ALD-Al2O3/In0.2GaA0.8/GaAs material system to a realized MOSFETs device for the first time. The application of ring-gate process was established as a feasible approach to rapidly examine/calibrate the high ��/III-V materials systems due to its simplicity in processing steps, consisting of gate metal and S/D contact metal formations without isolation step, and further enable to embody the MOSFETs operation. Furthermore, the nm-thin oxide layer (4.5 nm Al2O3) with extremely low gate leakage current densities around 8.06×10-9 A/cm2 at 1 MV/cm from a 8 �慆-gate-length device have also been achieved, that symbols one of the key capabilities of ALD-Al2O3 in downsizing field-effect transistors. Keywords: MOSFET, atomic layer deposition, high-�� gate dielectric, metal gate, III-V, Al2O3, InGaAs, GaAs Ming-Hwei Hong Ray-Nien Kwo 洪銘輝 郭瑞年 學位論文 ; thesis 138 en_US
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description 碩士 === 國立清華大學 === 材料科學工程學系 === 96 === Part (I): Oxide Scalability An equivalent oxide thickness about 1 nm for molecular beam epitaxy (MBE)-grown Ga2O3(Gd2O3) (GGO) on In0.2Ga0.8As has been achieved by employing a thin in situ deposited 3 nm thick Al2O3 protection layer. The novel hetero-structures are robust electrically and structurally with rapid thermal annealing (RTA) to high temperatures of 800-850°C under N2 flow. Furthermore, the dual gate oxide stacks of the Al2O3/GGO (33, 20, 10, 8.5, and 4.5 nm)/In0.2Ga0.8As/GaAs metal-oxide-semiconductor (MOS) capacitors remain amorphous after RTA up to 800-850°C, accompanied with atomically sharp smooth oxide/semiconductor interfaces and fully strained In0.2Ga0.8As/GaAs interface without lattice relaxation. Well behaved capacitance-voltage (C-V) curves of the MOS diodes have shown sharp transition from depletion to accumulation with small flatband voltage (1.1 V for Au metal gate and 0.1 V for Al), weak frequency dispersion (1.5%–5.4%) between 10 and 500 kHz at accumulation capacitance, and small hysteresis (116-170 mV) at half accumulation capacitance of 100 kHz. The observed inversion formation in the C-V characteristics under light illumination or quasi-static mode explicitly confirmed that the Fermi level is effectively unpinned by the GGO passivation approach. Low leakage current densities (3.1×10−5 and (10−8-10−9) A/cm2 at V=Vfb+1 V for Al2O3(3 nm)/GGO(4.5 and ≧8.5 nm), a high dielectric constant around 14-16 of GGO for all tested thicknesses, and a low interfacial density of states (Dit) in the low 1011 cm−2 eV−1 have also been accomplished. Keywords: molecular beam epitaxy, high-�� gate dielectric, III-V, MOS, oxide scaling, Ga2O3(Gd2O3), Al2O3, InGaAs, RTA. Part (II): GaAs-based MOSFET Well-behaved electrical characteristics of D-mode n-channel In0.2GaA0.8/GaAs MOSFETs with 4.5 nm thick atomic layer deposition (ALD)-grown Al2O3 as gate dielectric by using ring-gate process have been demonstrated, achieving a drain current of 33 mA/mm (at Vg=2.5V and Vd=3V), and a transconductance of 16 mS/mm (at Vg=-0.2V and Vd=2.5V) with a 8 �慆-gate-length and a 200 �慆-gate-width. TiN and Au/Ti were chosen as metal gates during device fabrication due to the suitable thermal stability and workfunction respectively. This demonstration also successfully extends our ALD-Al2O3/In0.2GaA0.8/GaAs material system to a realized MOSFETs device for the first time. The application of ring-gate process was established as a feasible approach to rapidly examine/calibrate the high ��/III-V materials systems due to its simplicity in processing steps, consisting of gate metal and S/D contact metal formations without isolation step, and further enable to embody the MOSFETs operation. Furthermore, the nm-thin oxide layer (4.5 nm Al2O3) with extremely low gate leakage current densities around 8.06×10-9 A/cm2 at 1 MV/cm from a 8 �慆-gate-length device have also been achieved, that symbols one of the key capabilities of ALD-Al2O3 in downsizing field-effect transistors. Keywords: MOSFET, atomic layer deposition, high-�� gate dielectric, metal gate, III-V, Al2O3, InGaAs, GaAs
author2 Ming-Hwei Hong
author_facet Ming-Hwei Hong
Kuen-Hao Shiu
徐堃豪
author Kuen-Hao Shiu
徐堃豪
spellingShingle Kuen-Hao Shiu
徐堃豪
以分子束磊晶成長氧化鋁/氧化鎵(氧化釓)/砷化銦鎵/砷化鎵金氧半電容之氧化層微縮特性研究與以原子層沉積術成長氧化鋁/砷化銦鎵/砷化鎵金氧半場效電晶體之製程與特性研究
author_sort Kuen-Hao Shiu
title 以分子束磊晶成長氧化鋁/氧化鎵(氧化釓)/砷化銦鎵/砷化鎵金氧半電容之氧化層微縮特性研究與以原子層沉積術成長氧化鋁/砷化銦鎵/砷化鎵金氧半場效電晶體之製程與特性研究
title_short 以分子束磊晶成長氧化鋁/氧化鎵(氧化釓)/砷化銦鎵/砷化鎵金氧半電容之氧化層微縮特性研究與以原子層沉積術成長氧化鋁/砷化銦鎵/砷化鎵金氧半場效電晶體之製程與特性研究
title_full 以分子束磊晶成長氧化鋁/氧化鎵(氧化釓)/砷化銦鎵/砷化鎵金氧半電容之氧化層微縮特性研究與以原子層沉積術成長氧化鋁/砷化銦鎵/砷化鎵金氧半場效電晶體之製程與特性研究
title_fullStr 以分子束磊晶成長氧化鋁/氧化鎵(氧化釓)/砷化銦鎵/砷化鎵金氧半電容之氧化層微縮特性研究與以原子層沉積術成長氧化鋁/砷化銦鎵/砷化鎵金氧半場效電晶體之製程與特性研究
title_full_unstemmed 以分子束磊晶成長氧化鋁/氧化鎵(氧化釓)/砷化銦鎵/砷化鎵金氧半電容之氧化層微縮特性研究與以原子層沉積術成長氧化鋁/砷化銦鎵/砷化鎵金氧半場效電晶體之製程與特性研究
title_sort 以分子束磊晶成長氧化鋁/氧化鎵(氧化釓)/砷化銦鎵/砷化鎵金氧半電容之氧化層微縮特性研究與以原子層沉積術成長氧化鋁/砷化銦鎵/砷化鎵金氧半場效電晶體之製程與特性研究
url http://ndltd.ncl.edu.tw/handle/10653664748931297197
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