Pipelined Encoding for a Flash Analog-to-Digital Converter
碩士 === 國立彰化師範大學 === 電機工程學系 === 96 === In this research, fundamentals of power line signal sampling, quantization, and design of a pipelined encoder for flash analog to digital converter (Flash ADC) are presented. The current mode logic (CML) is applied because of lower voltage supply and faster proc...
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Format: | Others |
Language: | zh-TW |
Published: |
2008
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Online Access: | http://ndltd.ncl.edu.tw/handle/40064734984142616238 |