Diagnosis Approaches for Multi-Core System Chips
碩士 === 國立中央大學 === 電機工程研究所 === 96 === Multi-core architecture with built-in self-test (BIST) has become a design trend for VLSI chips due to their needs of high performance and high reliability. Efficient approaches for diagnosing fail cores and scan chains thus are imperative for yield enhancement....
Main Authors: | Wei-jer Ross Hsieh, 謝維哲 |
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Other Authors: | Jin-Fu Li |
Format: | Others |
Language: | en_US |
Published: |
2008
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Online Access: | http://ndltd.ncl.edu.tw/handle/08051130915702637681 |
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