| Summary: | 博士 === 國立交通大學 === 電子工程系所 === 96 === Recently, the technology progress provides the major opportunities in both miniaturization and integration for advanced and portable electronic products, leading the community to believe that someday 3-D packaging approaches will come true, referred to as system-on-package (SoP). Some existing and emerging applications including sensors, memory modules and embedded processors will incorporate into the SoP approach and offer solutions towards faster time-to-market and business impediments.
During the integration and minimization technology, the capacitance density in the dynamic random access memory (DRAM), radio frequency (RF) circuit, and analog circuit continues to increases. Therefore, the high k dielectrics are used. Integrated into SoP, high k dielectric must meet many challenges of integration. The dielectric of Ba0.7Sr0.3TiO3/Cr/Ba0.7Sr0.3TiO3 (BST/Cr/BST) was developed for the capacitor of SoP application. With the insertion of a Cr interlayer, the temperature coefficient of capacitance (TCC) of specimens with BST/Cr(2nm)/BST multifilm dielectrics could achieve the improvement compared with that of BST monolayer, and the dissipation factor of the BST/Cr(2nm)/BST structure could also be reduced. The dielectric constant of BST/Cr(2nm)/BST structure decreases, but its dielectric constant of 371 is still very high. On the other hand, based on the International Technology Roadmap for Semiconductors (ITRS), total power consumption continues to increase. The chip heat dissipation and thermal stability for the device become the serious challenges for the SoP applications. BST/Cr(2nm)/BST shows the good TCC, while it is helpful to integrate into SoP.
In order to transfer the integral signal to the embedded capacitor in SoP system, the interconnect must provide high-speed and low-loss signals. However, the parasitic effects associated with interconnect become severe and cannot be ignored when the operating frequency increases. Small parasitic capacitances (C) between interconnects are required to reduce the crosstalk, power consumption, and RC delay associated with the metal interconnect system. Therefore, interconnect with low k property were required. In this study, hydrogen silsesquioxane (HSQ) thin films prepared, and the high frequency characteristics of Al/HSQ system and Cu/Ta/HSQ system are investigated and compared with those of Al/SiO2 system. The optimal interconnect case will be indicated in this thesis.
Finally, according to the optimal conditions of the capacitor and interconnect in this thesis, we can simulate the high frequency signal to transmit to the capacitor of BST/Cr/BST through HSQ/interconnect. The result indicates it is quite capacitive below 3GHz even if the temperature and/or applied voltage increase. Therefore, they are very potential to integrate into the SoP application of the portable and the communication.
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