An Instruction Dispatch Mechanism to Improve the Performance for the Chip Multiple Processor
碩士 === 國立中興大學 === 資訊科學與工程學系 === 96 === Nowadays, the market is moving to have multi-core processors in the same chip (Chip Multiprocessors - CMPs). In order to have a good performance in the CMPs, the instruction dispatch and parallel processing is the major key to improve the performance of multi-c...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Online Access: | http://ndltd.ncl.edu.tw/handle/65160660486708003294 |