| Summary: | 碩士 === 義守大學 === 機械與自動化工程學系碩士班 === 96 === Due to high I/O pin counts and complicate geometry, System-in
Package (SiP) has been the most popular package styles in the IC industries in the past decade. Because of mismatch of the coefficients of thermal expansion (CTE) of the components, many thermal stress-induced damages on the solder balls or solder bumps in SiP have been reported. This would be the main reason to cause the failure of the SiP products. In this study, reliability test on temperature cycle test (TCT) has been simulated and the maximum stressed area was predicted for SiP products. To save a huge computational time a 3-D finite element strip model with suitable boundary conditions is developed to evaluate the potential failure area. Based on Saint-Venant’s principle, by applying the so-called submodel technique, a more accurate numerical solution is found for all cases studied in this research. Three materials for solder balls and solder bumps used in this study, namely, Sn-3.5Ag-0.5Cu , Sn-3.9Ag-0.6Cu and Sn-4.0Ag-0.5Cu . Three analytical fatigue life models, i.e., creep strain energy density, total shear strain range and creep shear strain range were carefully examined. Among these materials, it is found that the predicted mean time to fatigue of Sn-3.9Ag-0.6Cu would be the longest, Sn-3.5Ag-0.5Cu is the second, and Sn-4.0Ag-0.5Cu is the shortest. Besides, the SiP models breaks first on the solder ball closest to original(the point of model nearest to bottom
left of the figure) by using material Sn-3.5Ag-0.5Cu and Sn-3.9Ag-0.6Cu. When using Sn-4.0Ag-0.5Cu alloy, it breaks first on the solder bump closet to original. The results obtained in this research are capable to provide some reference basis for discussing TCT for design engineers.
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