Overcoming Glitches and Early Propagation Effect to Counteract DPA Attacks
碩士 === 輔仁大學 === 電子工程學系 === 96 === Various logic styles have been proposed to counteract DPA (Differential Power Analysis) attacks. However, large area penalty must be incurred to make circuits glitch-free and to eliminate the early propagation effects. We found that a most recent design iMDPL still...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2008
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| Online Access: | http://ndltd.ncl.edu.tw/handle/86725570564405535850 |