Low Power Clock Gating with Aging Skew Considered
碩士 === 中原大學 === 電子工程研究所 === 96 === As the process technology scale down to deep sub-micron or nano-meter regime, the hot-carrier effect and NBTI are very important issues for circuit reliability. The delay of a logic gate increases (aging) is induced by these two effects is linearly proportional to...
| Main Authors: | , |
|---|---|
| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2008
|
| Online Access: | http://ndltd.ncl.edu.tw/handle/43769409304999398369 |