Reliability analysis of wafer-level chip-scale packaging technologies for CMOS image sensor

• Main Author: 陳自豪
• Other Authors: 陳精一
• Format: Others
• Language: zh-TW
• Published: 2008
• Online Access: http://ndltd.ncl.edu.tw/handle/07302228722841444428

碩士 === 中華大學 === 機械工程學系碩士班 === 96 === Abstract The objective of this thesis is to study the reliability of CMOS image sensor wafer level chip scale packages. The issues of the reliability can be categorized in two topics. One is the reliability of lead-free BGA and the other is the delamination and crack of the infrastructure of the packages. Lead is a poisonous material that causes serious environment pollution. Also, the merit of lead-free material characteristic drives the trend of using lead-free widespreadly. Amount of lead-free materials are available in the markets depending on its components. In order to predict the life of lead-free BGA, the reverse engineering is applied to obtain the fatigue characteristic of the lead-free material, Sn4Ag0.5Cu, adopted by this study. The concept of reverse engineering is correlated the experiment life and simulation life in the same package with and 63Pb/37Sn. The fatigue ductility coefficient of Sn4Ag0.5Cu is obtained about 0.14. It is satisfactory for Sn4Ag0.5Cu in utilizing the Modified Coffin-Manson fatigue model to predict the life reliability. The other failures in the infrastructure of CMOS packages are corrosion, delamination and crack due to moisture and thermal loading. Four types of CMOS package are investigated under three different loading conditions which are thermal cycle, uHAST and THST. The stress and strain between Dam and Cu-pad was analyzed by finite element method with ANSYS software. It has been found that the interface between Dam and Cu-pad are the most serious stress level in CIS structure and is corresponding to the experiment SEM. Furthermore, Dam dimension and material are selected as parameter study. The Cu-pad stress has reduced by increasing Dam thickness or decreasing Young’s modulus and coefficient of thermal expansion. Keywords: FEM, reverse engineering, lead-free solder reliability, CMOS package, Fatigue life, Moisture, Modified Coffin-Manson