Lane Detection System implemented on Embedded Platforms
碩士 === 長庚大學 === 電子工程學研究所 === 96 === A PXA255 embedded platform is used as a verifying environment to implement lane detecting algorithm in this thesis. The embedded platform having a CPU clock of 400MHZ, a Flash memory of 32MB and a SDRAM memory of 64MB is operated in the Linux operating system with...
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| Format: | Others |
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2008
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| Online Access: | http://ndltd.ncl.edu.tw/handle/29344367049841084150 |