Test Pattern Generation for Capture Power Reduction
碩士 === 元智大學 === 資訊工程學系 === 95 === Power dissipation has become an important issue in VLSI testing due to the growing complexity of designing integrated circuits. In scan-based testing, switching activity dominates total power consumption. Additionally, high power dissipation causes excessive IR drop...
Main Authors: | Yen-Po Tseng, 曾彥博 |
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Other Authors: | 曾王道 |
Format: | Others |
Language: | en_US |
Published: |
2007
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Online Access: | http://ndltd.ncl.edu.tw/handle/60149471222792635659 |
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