VLSI Design of Low-Error Multiplier and High-Performance Crossbar for DSP
碩士 === 國立雲林科技大學 === 電子與資訊工程研究所 === 95 === Multiplication is frequently required in the DSP. For the reasons of the higher speed and lower area, the thesis proposes the new truncation multiplier to improve the system performance. Besides, considering that the shared bus architecture can not supply th...
| Main Authors: | , |
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2007
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| Online Access: | http://ndltd.ncl.edu.tw/handle/19185495256940661425 |