The Design of Low-Power High-Speed Low-Noise PFD_CP_SC_PLL
碩士 === 淡江大學 === 電機工程學系碩士在職專班 === 95 === The Low-Power High-Speed Low-Noise PLL is a significant circuit for portable consumer devices. There are many sorts of PLLs due to its huge market demand. Its main applications are portable phones and GPS devices. It requires low-power for allowing the battery...
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| Format: | Others |
| Language: | en_US |
| Published: |
2007
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| Online Access: | http://ndltd.ncl.edu.tw/handle/45711131777665560014 |