| Summary: | 碩士 === 臺灣大學 === 電機工程學研究所 === 95 === Our thesis studies about bias temperature instability of low temperature polycrystalline silicon thin film transistors. In this thesis, we use different gate bias, stress gate bias time, temperature, and device structures to do our experiment. The different device structures are like LDD, channel types, gate stacks, and different width lengths etc. The goal of our experiment is to understand the electrical property of low temperature polycrystalline silicon thin film transistors. The electrical properties are like humps, threshold voltage shift, on current degrade and leakage current etc. Moreover, we want to build models of low temperature polycrystalline silicon thin film transistors about electrical properties. These models will be help for engineers who work about circuits.
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