超越10Gbps之超高速特徵比對電路設計及其在網路入侵偵測系統之應用
碩士 === 國立臺灣師範大學 === 資訊工程研究所 === 95 === A novel FPGA-based signature match circuit that can serve as the core of a hardware-based network intrusion detection system (NIDS) is presented in this paper. The circuit is based on simple shift registers and symbol encoders for the efficient signature match...
| Main Authors: | , |
|---|---|
| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2007
|
| Online Access: | http://ndltd.ncl.edu.tw/handle/16842325279219719735 |