A 10-bit 10MHz Two-Stage Pipelined Cyclic Analog to Digital Converter

碩士 === 國立清華大學 === 工程與系統科學系 === 95 ===

Bibliographic Details
Main Authors: Pan-Yeng Hung, 洪邦彥
Other Authors: Hwai-Pwu Chou
Format: Others
Language:zh-TW
Published: 2006
Online Access:http://ndltd.ncl.edu.tw/handle/34722018336618552826
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spelling ndltd-TW-095NTHU55930022016-05-25T04:13:40Z http://ndltd.ncl.edu.tw/handle/34722018336618552826 A 10-bit 10MHz Two-Stage Pipelined Cyclic Analog to Digital Converter 10位元10MHz二階管線化迴圈式類比數位轉換器 Pan-Yeng Hung 洪邦彥 碩士 國立清華大學 工程與系統科學系 95 Hwai-Pwu Chou 周懷樸 2006 學位論文 ; thesis 76 zh-TW
collection NDLTD
language zh-TW
format Others
sources NDLTD
description 碩士 === 國立清華大學 === 工程與系統科學系 === 95 ===
author2 Hwai-Pwu Chou
author_facet Hwai-Pwu Chou
Pan-Yeng Hung
洪邦彥
author Pan-Yeng Hung
洪邦彥
spellingShingle Pan-Yeng Hung
洪邦彥
A 10-bit 10MHz Two-Stage Pipelined Cyclic Analog to Digital Converter
author_sort Pan-Yeng Hung
title A 10-bit 10MHz Two-Stage Pipelined Cyclic Analog to Digital Converter
title_short A 10-bit 10MHz Two-Stage Pipelined Cyclic Analog to Digital Converter
title_full A 10-bit 10MHz Two-Stage Pipelined Cyclic Analog to Digital Converter
title_fullStr A 10-bit 10MHz Two-Stage Pipelined Cyclic Analog to Digital Converter
title_full_unstemmed A 10-bit 10MHz Two-Stage Pipelined Cyclic Analog to Digital Converter
title_sort 10-bit 10mhz two-stage pipelined cyclic analog to digital converter
publishDate 2006
url http://ndltd.ncl.edu.tw/handle/34722018336618552826
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