A 10-bit 10MHz Two-Stage Pipelined Cyclic Analog to Digital Converter
碩士 === 國立清華大學 === 工程與系統科學系 === 95 ===
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2006
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| Online Access: | http://ndltd.ncl.edu.tw/handle/34722018336618552826 |