Post-Layout Redundant Via Insertion Considering GDSII File Sizes
碩士 === 國立清華大學 === 資訊工程學系 === 95 === When the manufacturing processes of integrated circuits shrink to deep submicron technologies, loss of yield caused by via defects becomes more significant. In order to improve via yield and reliability, redundant via insertion is highly recommend by foundries. In...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2007
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| Online Access: | http://ndltd.ncl.edu.tw/handle/28407672930125127755 |