Simultaneous Supply and Threshold Voltage Assignment with Gate Sizing for Low Power
碩士 === 國立清華大學 === 資訊工程學系 === 95 === One of the most e®ective way to achieve low power is using multiple supply votages and multiple threshold voltages with gate sizing for modern ASIC designs. We propose a sensitivity based approach to minimize the total power consumption using simultaneous Vdd and...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2007
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| Online Access: | http://ndltd.ncl.edu.tw/handle/08360769296997655490 |