Stack Capacitors for Next-generation DRAM Technologies─Structural / Capacitance Analysis and Design
碩士 === 國立清華大學 === 動力機械工程學系 === 95 === In order to meet the requirement of the next-generation DRAM technology for higher density memories, the capacitance per memory cell needs to be increased and the storage node should be prevented from twin bit failure. The objective of this work is to estimate t...
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ndltd-TW-095NTHU53110572015-10-13T16:51:14Z http://ndltd.ncl.edu.tw/handle/39282480363321537237 Stack Capacitors for Next-generation DRAM Technologies─Structural / Capacitance Analysis and Design 下世代先進DRAM堆疊電容─結構/電容分析與設計 Yun-Chiao Chen 陳韻巧 碩士 國立清華大學 動力機械工程學系 95 In order to meet the requirement of the next-generation DRAM technology for higher density memories, the capacitance per memory cell needs to be increased and the storage node should be prevented from twin bit failure. The objective of this work is to estimate the structural strength and the capacitance of the DRAM stack capacitor, execute the parametric analyses of the capacitor’s profile and cross section and, then, design new stack capacitor. First, this work deals with the manufacturing process of X company's stack capacitor without support, the analyses of manufacturing thermal effect and allowable lateral displacement, and the calculation of the capacitance. The results show that (1) the structural strength of the X company's stack capacitor without support should be safe under the present manufacturing temperatures and allowable lateral displacement; (2) the bigger ratio of major/minor axes of the elliptical cross section of the capacitor without support is, the higher the capacitance it has. However, the structural strength in and directions is weaker than that of the capacitor with circular cross section; (3) with the increase of the height of dielectric layer, the lateral displacement of the capacitor and capacitance decrease; (4) to prevent the collapse contact of the capacitor without support and increase the capacitance, from the parametric analyses, one can increase the Poly Si outer radius, HSG inner radius and/or enlarge the top width of the capacitor. Based on the results described above, several new stack capacitor designs are proposed in this work and the application for patents is in process. The new capacitors can not only provide enough capacitance for data storage, but also keep themselves from twin bit failure. Furthermore, as compared with the prior arts, the new ones have simpler manufacturing process which provides lower cost and have more potential in industry applications. Wen-Hwa Chen Hsien-Chie Cheng 陳文華 鄭仙志 2007 學位論文 ; thesis 87 zh-TW |
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碩士 === 國立清華大學 === 動力機械工程學系 === 95 === In order to meet the requirement of the next-generation DRAM technology for higher density memories, the capacitance per memory cell needs to be increased and the storage node should be prevented from twin bit failure. The objective of this work is to estimate the structural strength and the capacitance of the DRAM stack capacitor, execute the parametric analyses of the capacitor’s profile and cross section and, then, design new stack capacitor.
First, this work deals with the manufacturing process of X company's stack capacitor without support, the analyses of manufacturing thermal effect and allowable lateral displacement, and the calculation of the capacitance. The results show that (1) the structural strength of the X company's stack capacitor without support should be safe under the present manufacturing temperatures and allowable lateral displacement; (2) the bigger ratio of major/minor axes of the elliptical cross section of the capacitor without support is, the higher the capacitance it has. However, the structural strength in and directions is weaker than that of the capacitor with circular cross section; (3) with the increase of the height of dielectric layer, the lateral displacement of the capacitor and capacitance decrease; (4) to prevent the collapse contact of the capacitor without support and increase the capacitance, from the parametric analyses, one can increase the Poly Si outer radius, HSG inner radius and/or enlarge the top width of the capacitor.
Based on the results described above, several new stack capacitor designs are proposed in this work and the application for patents is in process. The new capacitors can not only provide enough capacitance for data storage, but also keep themselves from twin bit failure. Furthermore, as compared with the prior arts, the new ones have simpler manufacturing process which provides lower cost and have more potential in industry applications.
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author2 |
Wen-Hwa Chen |
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Wen-Hwa Chen Yun-Chiao Chen 陳韻巧 |
author |
Yun-Chiao Chen 陳韻巧 |
spellingShingle |
Yun-Chiao Chen 陳韻巧 Stack Capacitors for Next-generation DRAM Technologies─Structural / Capacitance Analysis and Design |
author_sort |
Yun-Chiao Chen |
title |
Stack Capacitors for Next-generation DRAM Technologies─Structural / Capacitance Analysis and Design |
title_short |
Stack Capacitors for Next-generation DRAM Technologies─Structural / Capacitance Analysis and Design |
title_full |
Stack Capacitors for Next-generation DRAM Technologies─Structural / Capacitance Analysis and Design |
title_fullStr |
Stack Capacitors for Next-generation DRAM Technologies─Structural / Capacitance Analysis and Design |
title_full_unstemmed |
Stack Capacitors for Next-generation DRAM Technologies─Structural / Capacitance Analysis and Design |
title_sort |
stack capacitors for next-generation dram technologies─structural / capacitance analysis and design |
publishDate |
2007 |
url |
http://ndltd.ncl.edu.tw/handle/39282480363321537237 |
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