Design of Fast Lock Clock and Data Recovery Architecture
碩士 === 國立宜蘭大學 === 電子工程學系碩士班 === 95 === Clock and Data Recovery (CDR) is widely applicable to data communications, such as optical fiber communications. However, the voltage control oscillator (VCO) used in the conventional CDR architecture is controlled by the outputs of multiple loops. This facilit...
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2007
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| Online Access: | http://ndltd.ncl.edu.tw/handle/08448017048937095728 |