High-Performance Pipeline Design for Low-Power Phased Cache
碩士 === 國立交通大學 === 電機與控制工程系所 === 95 === Low power and high performance design issues have played an important role among various portable systems and applications. In embedded processors, the cache design almost occupies half chip area and power consumption. According to Amdahl’s Law, if we could red...
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| Format: | Others |
| Language: | zh-TW |
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2007
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| Online Access: | http://ndltd.ncl.edu.tw/handle/h2h24y |