The Investigation and Application of High-κ Dielectrics and Metal Gate Process Technologies
博士 === 國立交通大學 === 電子工程系所 === 95 === To continue down-scaling CMOS technology, traditional insulator layer - SiO2 will face the physical limitation - large gate leakage current. In addition, traditional poly-Si gate encounters several inherent limitations, such as poly-Si depletion, boron penetration...
Main Authors: | , |
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Other Authors: | |
Format: | Others |
Language: | en_US |
Published: |
2006
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Online Access: | http://ndltd.ncl.edu.tw/handle/61613790343762107866 |