Investigation of Reliability Issues in Nitride Trap Storage Flash Memory

博士 === 國立交通大學 === 電子工程系所 === 95 === This thesis will focus on the reliability issues of SONOS-type trapping storage flash memories. For today’s SONOS cells, a thicker bottom oxide is employed to improve the retentivity. These cells exhibit excellent data retention behavior before stress. After P/E c...

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Main Authors: Shaw-Hung Gu, 古紹泓
Other Authors: Tahui Wang
Format: Others
Language:en_US
Published: 2006
Online Access:http://ndltd.ncl.edu.tw/handle/91462856739306168593
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description 博士 === 國立交通大學 === 電子工程系所 === 95 === This thesis will focus on the reliability issues of SONOS-type trapping storage flash memories. For today’s SONOS cells, a thicker bottom oxide is employed to improve the retentivity. These cells exhibit excellent data retention behavior before stress. After P/E cycling, the bottom oxide is damaged, thereby degrading the reliability. In Chapter 1, the device structure and program/erase methods of the cell are described. A reverse read scheme for two-bit operation is illustrated. With respect to the cell endurance, the threshold voltage in program-state or in erase-state may shift upward as P/E cycle number increases. The mechanism will be investigated in Chapter 2. To expound the second-bit effect, a modified charge pumping technique to characterize programmed charge lateral distribution is proposed in Chapter 3. The stored charge distribution of each bit over the source/drain junctions can be profiled separately. Our result shows that the secondly programmed bit has a broader stored charge distribution than the first programmed bit. The reason is that a large channel field exists under the first programmed bit during the second bit programming. Such a large field accelerates channel electrons and causes earlier electron injection into the nitride. In addition, we find that programmed charges spread further into the channel as program/erase cycle number increases. Reliability issues including erase-Vt state threshold voltage instability, read-disturb, and high-Vt state charge loss will be addressed in Chapter 4. First, an erase-state threshold drift with storage time is observed in a P/E cycled cell. This drift has insignificant temperature dependence and exhibits an anomalous turn-around with P/E cycle number. This peculiar phenomenon is strongly related to the creation of positive charged defects in the bottom oxide. The temporal evolution of the threshold voltage drift has log(t) dependence on storage time and can be well described by the tunneling front model. Furthermore, at a sufficiently large read bias, positive charge assisted channel electron tunneling dominates the threshold voltage shift, causing a power-law time relation. By measuring the dependence of electric field and temperature, an analytical model based on Frenkel-Poole emission followed by oxide trap assisted tunneling successfully identifies the mechanism for charge loss. With use this model, a Vg acceleration method for retention lifetime test is also proposed. Bottom oxide thickness and program/erase stress effects on charge retention in SONOS flash memory cells with FN programming are investigated. Utilizing a numerical analysis based on a multiple electron trapping model, the electron retention behavior in a SONOS cell with bottom oxide thickness from 1.8nm to 5.0nm is simulated. In our model, the nitride traps have a continuous energy distribution. A series of Frenkel-Poole excitation of trapped electrons to the conduction band and electron re-capture into nitride traps feature the transitions between the conduction band and trap states. Conduction band electron tunneling via positively charged oxide traps created by high-voltage stress and trapped electron direct tunneling through the bottom oxide is included to describe various charge leakage paths. We measure the nitride charge leakage current directly in a large area device for comparison. Our study reveals that the charge retention loss in a high-voltage stressed cell with a thicker bottom oxide (5nm) exhibits two stages. The charge leakage current is limited by oxide trap assisted tunneling in the first stage and then follows a 1/t time dependence due to the Frenkel-Poole emission in the second stage. The transition time from the first stage to the second stage is related to oxide trap assisted tunneling time, but is prolonged by a factor. According to the above understanding, the silicon nitride trap density can be extracted from the 1/t transient current in Chapter 6. In Chapter 7, program/erase stress induced read current fluctuation arising from random telegraph noise (RTN) in a localized, multi-level SONOS cells is explored. Our study shows that localized charge storage significantly enhances RTN. The amplitude of RTN varies in different program levels of a multi-level cell. The broadening of read current distribution caused by RTN is characterized and modeled. Better bottom oxide process can reduce read current noise. Conclusions are finally made in Chapter 8.
author2 Tahui Wang
author_facet Tahui Wang
Shaw-Hung Gu
古紹泓
author Shaw-Hung Gu
古紹泓
spellingShingle Shaw-Hung Gu
古紹泓
Investigation of Reliability Issues in Nitride Trap Storage Flash Memory
author_sort Shaw-Hung Gu
title Investigation of Reliability Issues in Nitride Trap Storage Flash Memory
title_short Investigation of Reliability Issues in Nitride Trap Storage Flash Memory
title_full Investigation of Reliability Issues in Nitride Trap Storage Flash Memory
title_fullStr Investigation of Reliability Issues in Nitride Trap Storage Flash Memory
title_full_unstemmed Investigation of Reliability Issues in Nitride Trap Storage Flash Memory
title_sort investigation of reliability issues in nitride trap storage flash memory
publishDate 2006
url http://ndltd.ncl.edu.tw/handle/91462856739306168593
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spelling ndltd-TW-095NCTU54280422016-05-25T04:13:41Z http://ndltd.ncl.edu.tw/handle/91462856739306168593 Investigation of Reliability Issues in Nitride Trap Storage Flash Memory 氮化矽快閃式記憶元件可靠度之探討 Shaw-Hung Gu 古紹泓 博士 國立交通大學 電子工程系所 95 This thesis will focus on the reliability issues of SONOS-type trapping storage flash memories. For today’s SONOS cells, a thicker bottom oxide is employed to improve the retentivity. These cells exhibit excellent data retention behavior before stress. After P/E cycling, the bottom oxide is damaged, thereby degrading the reliability. In Chapter 1, the device structure and program/erase methods of the cell are described. A reverse read scheme for two-bit operation is illustrated. With respect to the cell endurance, the threshold voltage in program-state or in erase-state may shift upward as P/E cycle number increases. The mechanism will be investigated in Chapter 2. To expound the second-bit effect, a modified charge pumping technique to characterize programmed charge lateral distribution is proposed in Chapter 3. The stored charge distribution of each bit over the source/drain junctions can be profiled separately. Our result shows that the secondly programmed bit has a broader stored charge distribution than the first programmed bit. The reason is that a large channel field exists under the first programmed bit during the second bit programming. Such a large field accelerates channel electrons and causes earlier electron injection into the nitride. In addition, we find that programmed charges spread further into the channel as program/erase cycle number increases. Reliability issues including erase-Vt state threshold voltage instability, read-disturb, and high-Vt state charge loss will be addressed in Chapter 4. First, an erase-state threshold drift with storage time is observed in a P/E cycled cell. This drift has insignificant temperature dependence and exhibits an anomalous turn-around with P/E cycle number. This peculiar phenomenon is strongly related to the creation of positive charged defects in the bottom oxide. The temporal evolution of the threshold voltage drift has log(t) dependence on storage time and can be well described by the tunneling front model. Furthermore, at a sufficiently large read bias, positive charge assisted channel electron tunneling dominates the threshold voltage shift, causing a power-law time relation. By measuring the dependence of electric field and temperature, an analytical model based on Frenkel-Poole emission followed by oxide trap assisted tunneling successfully identifies the mechanism for charge loss. With use this model, a Vg acceleration method for retention lifetime test is also proposed. Bottom oxide thickness and program/erase stress effects on charge retention in SONOS flash memory cells with FN programming are investigated. Utilizing a numerical analysis based on a multiple electron trapping model, the electron retention behavior in a SONOS cell with bottom oxide thickness from 1.8nm to 5.0nm is simulated. In our model, the nitride traps have a continuous energy distribution. A series of Frenkel-Poole excitation of trapped electrons to the conduction band and electron re-capture into nitride traps feature the transitions between the conduction band and trap states. Conduction band electron tunneling via positively charged oxide traps created by high-voltage stress and trapped electron direct tunneling through the bottom oxide is included to describe various charge leakage paths. We measure the nitride charge leakage current directly in a large area device for comparison. Our study reveals that the charge retention loss in a high-voltage stressed cell with a thicker bottom oxide (5nm) exhibits two stages. The charge leakage current is limited by oxide trap assisted tunneling in the first stage and then follows a 1/t time dependence due to the Frenkel-Poole emission in the second stage. The transition time from the first stage to the second stage is related to oxide trap assisted tunneling time, but is prolonged by a factor. According to the above understanding, the silicon nitride trap density can be extracted from the 1/t transient current in Chapter 6. In Chapter 7, program/erase stress induced read current fluctuation arising from random telegraph noise (RTN) in a localized, multi-level SONOS cells is explored. Our study shows that localized charge storage significantly enhances RTN. The amplitude of RTN varies in different program levels of a multi-level cell. The broadening of read current distribution caused by RTN is characterized and modeled. Better bottom oxide process can reduce read current noise. Conclusions are finally made in Chapter 8. Tahui Wang 汪大暉 2006 學位論文 ; thesis 140 en_US