On reducing clock network power consumption by low-swing DME buffering technique
碩士 === 國立交通大學 === 電子工程系所 === 95 ===
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Other Authors: | |
Format: | Others |
Language: | en_US |
Published: |
2006
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Online Access: | http://ndltd.ncl.edu.tw/handle/66865847463512244397 |