The Chip Design of Digital Signal Processor which Supports Logarithm Operator
碩士 === 國立暨南國際大學 === 電機工程學系 === 95 === In this thesis, we proposed a digital signal processor which supports logarithm operator and use its specific instruction set to implement the speech recognition algorithm. We use hardware-software co-design methodology to optimize the processor architecture and...
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| Format: | Others |
| Language: | en_US |
| Published: |
2007
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| Online Access: | http://ndltd.ncl.edu.tw/handle/04485163864550319913 |