Using MTS and Neural Network for WAT and Circuit Probe yield model in Semiconductor Process.
碩士 === 明志科技大學 === 工業管理研究所 === 96 === Wafer yield is important key index of financial affairs, process capability and even guarantee the products could be supplied steadily. Under present control parameter and method adopted, appear some wafers yield on the low side, even zero.With the hiving off of...
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2008
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| Online Access: | http://ndltd.ncl.edu.tw/handle/62549901535087578970 |