Yield-Driven Wiring and Via Improvement with Timing Consideration
碩士 === 中華大學 === 資訊工程學系(所) === 95 === In VDSM technologies, the process variation becomes more and more serious. Due to the difficulty of lithography and manufacture in nanometer process, the concept of yield-driven design becomes more and more important for modern chip designs. For a given design, t...
| Main Authors: | , |
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2007
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| Online Access: | http://ndltd.ncl.edu.tw/handle/08246461708106363319 |