Study on the MOSFETs with Hf-Silicate Gate Dielectrics through Various Post Annealings

碩士 === 國立臺北科技大學 === 機電整合研究所 === 94 === As CMOS devices are scaled aggressively into nanometer regime, SiO2 gate dielectric is approaching its physical and electrical limits. The primary issue is the intolerably huge leakage current caused by the direct tunneling of carriers through the ultrathin oxi...

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Bibliographic Details
Main Authors: Ke-Chung Chen, 陳科仲
Other Authors: Heng-Sheng Huang
Format: Others
Language:en_US
Published: 2006
Online Access:http://ndltd.ncl.edu.tw/handle/upj6hp