Design and Implementation of FPGA-based Adaptive Fuzzy Speed Control IC for Permanent Magnet Synchronous Motor

碩士 === 南台科技大學 === 電機工程系 === 94 === This main research of this thesis is to develop an adaptive speed controller for permanent magnet synchronous motor (PMSM) based on ALTERA-Cyclone EP1C20F400C7 FPGA technology. In the current control loop, vector control technology is used to improve the nonlinear...

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Bibliographic Details
Main Authors: Shing An,Tsai, 蔡幸岸
Other Authors: Ying Shieh,Kung
Format: Others
Language:zh-TW
Published: 2006
Online Access:http://ndltd.ncl.edu.tw/handle/36048031607907473084
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Summary:碩士 === 南台科技大學 === 電機工程系 === 94 === This main research of this thesis is to develop an adaptive speed controller for permanent magnet synchronous motor (PMSM) based on ALTERA-Cyclone EP1C20F400C7 FPGA technology. In the current control loop, vector control technology is used to improve the nonlinear phenomenon of PMSM. In the IP (Intelligent Property) design of current control loop, the finite state machine (FSM) method is utilized to implement the function of coordinate transformation, sin/cos table and PI controller of the PMSM drive, and to reduce the utilities in FPGA. In the speed control loop, an adaptive fuzzy controller is adopted to increase the robust performance under the effect of motor uncertainty and load disturbance. The adaptive fuzzy controller is consisted of a fuzzy controller, a reference model and adjustable mechanism and the rules of the fuzzy controller can be updated in real time by adjustable mechanism. In the IP design of speed control loop, due to the parallel implementation of fuzzy controller in FPGA is resource consumption, the FSM method-part of serial implementation, is used again in the design of fuzzy controller IP to reduce the utilities of FPGA but without loss system performance. Finally, to evaluate the performance of the proposed IP design technology in PMSM, in this thesis, first, all of function to implement a fully digital AC motor drive, such as the intelligent controller in speed loop, and the coordinate transformation, SVPWM output, QEP detection, vector control in current loop, is integrated in a FPGA chip. Then, an experimental system, based on Cyclone EP1C20F400C7 experimental board, inverter, PMSM, external load, is set up and some experimental results are proven the correctness and validity of the proposed technologies.