XROUTE: AN X-ARCHITECTURE FULL-CHIP ROUTER BASED ON A NOVEL MULTILEVEL FRAMEWORK
碩士 === 國立臺灣大學 === 電機工程學研究所 === 94 === As nanometer IC technologies advance, the interconnect delay has become a first order effect on chip performance. To handle this effect, the X-architecture has been proposed for high-performance integrated circuits. In this thesis, we present a novel multilevel...
Main Authors: | , |
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Other Authors: | |
Format: | Others |
Language: | en_US |
Published: |
2005
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Online Access: | http://ndltd.ncl.edu.tw/handle/94155365536830945694 |