A High Performance Circuit Design Applied to Network Intrusion Detection System on a SoPC Platform
碩士 === 國立臺灣師範大學 === 資訊工程研究所 === 94 === This thesis introduces a novel FPGA based signature match co-processor that can serve as the core of a hardware-based network intrusion detection system (NIDS). The central idea of the signature match coprocessor is an architecture based on the shift-or algorit...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2006
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| Online Access: | http://ndltd.ncl.edu.tw/handle/77216383694416860242 |