Timing Driven Power Gating
碩士 === 國立清華大學 === 資訊工程學系 === 94 === Power gating is effective for reducing leakage power. Previously, a Distributed Sleep Transistor Network (DSTN) was proposed to reduce the sleep transistor area by connecting all the virtual ground lines together to minimize the Maximum Instantaneous Current (MIC)...
Main Authors: | , |
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Other Authors: | |
Format: | Others |
Language: | en_US |
Published: |
2006
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Online Access: | http://ndltd.ncl.edu.tw/handle/68210064503282803563 |