Fabrication and Simulation of the Bottom Gate Thin Film Transistor with Smart Body Tie
碩士 === 國立中山大學 === 電機工程學系研究所 === 94 === In this thesis, a bottom gate TFT with smart body tie device is realized, For a PDSOI devices, which usually uses large layout areas of body ties, and it has self-heating effect resulting from the buried oxide between the silicon film and substrate, which has a...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2006
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| Online Access: | http://ndltd.ncl.edu.tw/handle/08023805508858319103 |