| Summary: | 博士 === 國立交通大學 === 電子工程系所 === 94 === Two novel dual work function metal gate technologies are investigated and proposed. With the down-scaling of the device geometry for performance improvement, inherent drawbacks of conventional polysilicon gate electrodes lead to increasingly significant negative influence. In addition, the high-k gate dielectrics have been introduced to replace the conventional silicon dioxide. Consequently, under the same effective oxide thickness, the gate leakage current can be effectively reduced. Unfortunately, polysilicon gates have been reported to be thermodynamically unstable on many high-k materials and lead to Fermi-level pinning effect at the polysilicon/high-k interface. Therefore, metal gates are expected to provide a turning point in possessing a better thermal stability and a retardation of the Fermi-level pinning effect. In addition, metal gates can possess a lower gate resistance and enhance the device performance at higher frequency.
The basic requirements for a novel metal gate technology include providing suitable work function values at the gate dielectric interface, the good enough thermal stability with the underlying gate dielectrics and a compatible device integration process. Two novel metal gate technologies are proposed in this dissertation. One is based on the metal intermixing technique, and the other is based on the silicidation technique. We firstly investigate the electrical and chemical characteristics of Hf-Mo binary alloys deposited by co-sputtering technique. A continuous and almost linear work function adjustment using HfxMo(1-x) is demonstrated for the first time. The work function value of Hf-Mo binary alloy ranges from 3.93eV (work function of pure Hf) to 4.93eV (work function of pure Mo) and depends on the sputtering power ratio of each target. The thermal stabilities of Hf-Mo binary alloy on SiO2 are found to degrade with the increase of Hf atomic fraction, but all of the Hf-Mo binary alloys possess thermal stabilities at least higher than 400℃. The Hf-Mo binary alloys can be appropriate for a gate-last SiO2 CMOS process.
The practicable integration of Hf-Mo binary alloys into the dual metal gate process is also proposed. HfxMo(1-x) formed by metal intermixing of the Hf/Mo stack is firstly evaluated, and a novel dual work function metal gate technology is then proposed and demonstrated. A precise control over the work function of the Hf-Mo binary alloy by adjusting the composite metal thickness ratio TR (TR = THf / TMo) is demonstrated. Besides, the required thermal budget for a complete metal intermixing is demonstrated to depend on the total metal thickness, TM (TM = THf + TMo). Therefore, one can be allowed to get around the thermal stability issue by using an appropriate TM value. This technique is not only attractive but especially important for devices with advanced transistor structures, such as FinFET and/or UTB-MOSFET devices, since the substrate doping modulation may not be an efficient way to adjust the threshold voltages of devices with advanced transistor structures.
The other novel dual metal gate technology proposed in this dissertation is based on using the silicidation technique. The amorphous-Si/Mo stack was fabricated and thermal annealed to form MoSix. The work function of MoSix is found to be lower than that of Mo, and the thermal stability of MoSix is evaluated to be higher than 950℃. Combining MoSix with the pure Mo gate, a practical integration into the dual metal gate technology is then proposed. On the SiO2 gate dielectric, the combination of Mo-MoSix possesses a work function shift appropriate for devices with advanced transistor structures. Furthermore, the additional arsenic pre-implantation into the amorphous-Si layer prior to the silicidation annealing is demonstrated to effectively lower the work function of MoSix. Consequently, the application of the proposed novel dual metal gate technology can be expanded to the conventional bulk devices. Besides, the new structure along with the ruling out of p-type metal silicide is also demonstrated to eliminate the boron penetration problem encountered with the reported FUSI method.
On high-k gate dielectric materials, the maintenance of the considerable work function shift is also demonstrated. The extracted work function value of pure Mo or MoSi2 gate on HfO2 is slightly lower than that on SiO2, but the work function difference between Mo and MoSix is almost the same regardless of the underlying gate dielectric materials. The arsenic pre-implantation still has effect upon the modulation of work function of metal silicide on HfO2, even though the modulation range is a little smaller than that on SiO2. The influence of Fermi-level pinning effect, which has been reported to be responsible for the high threshold voltages of FUSI gated devices with the high-k gate dielectric, is also discussed. The Fermi-level pinning effect seems to be retarded in the proposed Mo-MoSix dual metal gate technology. We speculate that the improvement may be attributed to the separation of silicon layer from the high-k gate dielectrics.
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