Speedup Power Prediction for the low power Analysis of Fault Tolerant System on Gate-Level

碩士 === 中華大學 === 資訊工程學系(所) === 94 === Nowadays DSM(Deep Submicron)has developed by the progress of the chip manufacture and material technique has highlighted the VLSI’s need for high performance、low area、reliability、low power dissipation.Especially for minimizing average power and portable property...

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Bibliographic Details
Main Author: 張雲斌
Other Authors: 陳永源
Format: Others
Language:zh-TW
Published: 2006
Online Access:http://ndltd.ncl.edu.tw/handle/20800722012567331035