A Voltage-Controlled Tuning Loop for Adjustable Dual-Slope Charge-Pump to Achieve Fast Lock PLL
碩士 === 中華大學 === 電機工程學系碩士班 === 94 === In the design of phase-locked loop (PLL), the most important consideration is the steady and reliable frequency. When we change the input frequency, the PLL will go to be in lock at the least time. So, we will design of the how to reduce the locking time of the P...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2006
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| Online Access: | http://ndltd.ncl.edu.tw/handle/56845028877324024846 |