Hardware Implementation of AES Algorithm using FPGA
碩士 === 長庚大學 === 電機工程研究所 === 94 === The AES (advanced encryption standard) algorithm is adopted by NIST (National Institude of Standard and Technology) in 2001 as a symmetric-key encryption standard. The block length of AES is 128 bits while its key length can be 128, 192 or 256 bits, that it is a ve...
Main Authors: | , |
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Other Authors: | |
Format: | Others |
Language: | zh-TW |
Published: |
2006
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Online Access: | http://ndltd.ncl.edu.tw/handle/04473717679136079464 |