Array Structure Recognition in Flatten Layout
碩士 === 元智大學 === 資訊工程學系 === 93 === This thesis proposes an algorithm to find out array structures from a layout design. The so-obtained array structures can be employed to reduce DRC processing time. Our algorithm consists of five phases. In the first phase, we build a R-B tree for all the cells with...
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| Format: | Others |
| Language: | en_US |
| Published: |
2005
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| Online Access: | http://ndltd.ncl.edu.tw/handle/25748222726432973482 |
| Summary: | 碩士 === 元智大學 === 資訊工程學系 === 93 === This thesis proposes an algorithm to find out array structures from a layout design. The so-obtained array structures can be employed to reduce DRC processing time. Our algorithm consists of five phases. In the first phase, we build a R-B tree for all the cells with the same cell template. We then employ R-B trees to find out all scratched arrays. The second phase identifies mosaic arrays by intersecting the scratched arrays. A mosaic array consists of many mosaic cells, each of which contains more than one cell instance. The third phase removes the noise cell from the (mosaic) arrays. The fourth phase merges neighboring arrays into a rabbeted array. The last phase decides the actual shapes of recognized arrays by removing those cells not useful for reducing DRC processing time. The algorithm has the time complexity and the space complexity , where is the number of cells with template .
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