Load Speculation

碩士 === 大同大學 === 資訊工程學系(所) === 93 === The superscalar processor must issue any instructions as early as possible to enhance the performance. But load instructions would be issued with register dependencies are solved and memory dependencies are known. Register dependence – load instruction must wait...

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Bibliographic Details
Main Authors: Cheng-Chun Lin, 林振鈞
Other Authors: Jong-Jiann Shieh
Format: Others
Language:en_US
Published: 2005
Online Access:http://ndltd.ncl.edu.tw/handle/12477140719287070515