Research of Silicon Wafer Thinning Technology

• Main Authors: Hsi-Tien Liao, 廖錫田
• Other Authors: 楊宏智
• Format: Others
• Language: zh-TW
• Published: 2005
• Online Access: http://ndltd.ncl.edu.tw/handle/43491641552303447644

博士 === 國立臺灣大學 === 機械工程學研究所 === 93 === Abstract Silicon wafers are most extensively used materials for integrated circuit (IC) substrates. As the demand of miniaturization with higher performance standards for electronic devices such as memory cards, smart cards, portable communication devices, and portable computers becomes a clear trend. IC package makes it a requirement to reduce both feature sizes and chip thickness. These requirements render the chip and packaging designers to develop high-speed, ultra-thin chips that utilize less individual area and overall package height to accommodate multiple layers of dense interconnects. The chips that are required to fit into these more intelligent devices have to be remarkably thin, which indicates that silicon chip thinning and stress relief considerations are becoming more significant issues in the backend and assembly areas of semiconductor component manufacturing. In this research, experimental observations are conducted to investigate the effects of various parameters on the surface finish and subsurface damage (SSD) of ground silicon wafers. As there are more technological advancements in stacked chip packaging, backside wafer surface conditioning and stress relief applications become an essential focus. Using wet chemical etching technology for wafer thinning not only provides a means of strength enhancement but allows the user to control the backside wafer surface finish. Various degrees of backside wafer surface finish can be achieved with aqueous chemical etchants. Because the roughened backside wafer surface can be created with the introduced chemicals, it is found that no propagating crystalline defects are accompanied, but rather leaves the wafer in an optimum state for back metal adhesion. Other crucial item in the study is to investigate the residual stress on the backside surface. The technology of wafer thinning is well tested, and the process fine tuned. The goal of compiling a specific database for the thinning process is finally achieved. Keywords: Silicon Wafer, Thinning, Wet Chemical Etching, and Residual Stress.