Phase-adjustable Negative Phase Shifter Using A Single-shot Locking Method and A 10-bit 80 MHz Analog to Digital Converter for DVB-T Receivers
碩士 === 國立中山大學 === 電機工程學系研究所 === 93 === The first topic of this thesis proposes a digital negative phase shifter circuit which generates a clock with adjustable negative delays (phase shift) in order to avoid multi-locking hazards. Arbitrary negative phase can be generated by using multiplexers and v...
| Main Authors: | , |
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2005
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| Online Access: | http://ndltd.ncl.edu.tw/handle/85279492517511568970 |