Variable-Length VLIW Encoding & its Decoding Architectures
碩士 === 國立交通大學 === 電子工程系所 === 93 === VLIW-based architectures are very popular in high-performance DSP processors, for their relatively simpler implementations and more predictable execution times. But they need more program memory because of (1) the fixed-length instruction encoding, (2) NOP inserti...
| Main Authors: | , |
|---|---|
| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2005
|
| Online Access: | http://ndltd.ncl.edu.tw/handle/08844912145276850569 |