Effects of Post-Deposition N2O Plasma Treatment on the Reliability Issues of pMOSFETs with HfO2/SiON Gate Stacks

碩士 === 國立交通大學 === 電子工程系所 === 93 === With aggressive device scaling, shrinking the conventional thin silicon dioxide gate dielectric to the range of 2nm has caused an unbearable direct tunneling leakage current. To solve the problem, it is necessary to replace SiO2 by some high-k dielectric materials...

Full description

Bibliographic Details
Main Authors: Tsung-Chieh Lee, 李聰杰
Other Authors: Tiao-Yaun Huang
Format: Others
Language:en_US
Published: 2005
Online Access:http://ndltd.ncl.edu.tw/handle/87974793430070770445
id ndltd-TW-093NCTU5428058
record_format oai_dc
spelling ndltd-TW-093NCTU54280582016-06-06T04:10:40Z http://ndltd.ncl.edu.tw/handle/87974793430070770445 Effects of Post-Deposition N2O Plasma Treatment on the Reliability Issues of pMOSFETs with HfO2/SiON Gate Stacks 後沉積之一氧化二氮氣體電漿處理對二氧化鉿堆疊式閘極金氧半場效電晶體電性之影響 Tsung-Chieh Lee 李聰杰 碩士 國立交通大學 電子工程系所 93 With aggressive device scaling, shrinking the conventional thin silicon dioxide gate dielectric to the range of 2nm has caused an unbearable direct tunneling leakage current. To solve the problem, it is necessary to replace SiO2 by some high-k dielectric materials such as HfO2. However, there are many outstanding issues in high-k materials, such as high interface state densities, large amounts of bulk traps, etc. In this thesis, we try to use post-deposition N2O plasma nitridation to improve the HfO2 film quality. We found that N2O plasma nitridation brings about many advantages such as reduced gate leakage current, increased Gm peak value, better subthreshold swing, reduced interface states and bulk traps in the HfO2. The dominant current transport mechanism in HfO2 gate dielectric is of the Frenkel-Poole type, and the electron traps are located at a deeper energy position after N2O plasma nitridation. Also, the preponderant trapping behaviors become electron-trapping dominant, rather than hole-trapping dominant, after N2O plasma nitridation. Under the constant voltage stress (CVS) and negative bias temperature instability (NBTI), we found that bulk traps in HfO2, rather than interface state densities, are responsible for the transistor degradation. Under dynamic stress, both the off-time de-trapping and the lack of hole trapping due to short on-time are required to explain the behavior of threshold voltage degradation. Finally, through the help of carrier separation experiments, we have clarified whether the breakdown originates in the bulk or the interfacial layer. Tiao-Yaun Huang Chao-Hsin Chien 黃調元 簡昭欣 2005 學位論文 ; thesis 84 en_US
collection NDLTD
language en_US
format Others
sources NDLTD
description 碩士 === 國立交通大學 === 電子工程系所 === 93 === With aggressive device scaling, shrinking the conventional thin silicon dioxide gate dielectric to the range of 2nm has caused an unbearable direct tunneling leakage current. To solve the problem, it is necessary to replace SiO2 by some high-k dielectric materials such as HfO2. However, there are many outstanding issues in high-k materials, such as high interface state densities, large amounts of bulk traps, etc. In this thesis, we try to use post-deposition N2O plasma nitridation to improve the HfO2 film quality. We found that N2O plasma nitridation brings about many advantages such as reduced gate leakage current, increased Gm peak value, better subthreshold swing, reduced interface states and bulk traps in the HfO2. The dominant current transport mechanism in HfO2 gate dielectric is of the Frenkel-Poole type, and the electron traps are located at a deeper energy position after N2O plasma nitridation. Also, the preponderant trapping behaviors become electron-trapping dominant, rather than hole-trapping dominant, after N2O plasma nitridation. Under the constant voltage stress (CVS) and negative bias temperature instability (NBTI), we found that bulk traps in HfO2, rather than interface state densities, are responsible for the transistor degradation. Under dynamic stress, both the off-time de-trapping and the lack of hole trapping due to short on-time are required to explain the behavior of threshold voltage degradation. Finally, through the help of carrier separation experiments, we have clarified whether the breakdown originates in the bulk or the interfacial layer.
author2 Tiao-Yaun Huang
author_facet Tiao-Yaun Huang
Tsung-Chieh Lee
李聰杰
author Tsung-Chieh Lee
李聰杰
spellingShingle Tsung-Chieh Lee
李聰杰
Effects of Post-Deposition N2O Plasma Treatment on the Reliability Issues of pMOSFETs with HfO2/SiON Gate Stacks
author_sort Tsung-Chieh Lee
title Effects of Post-Deposition N2O Plasma Treatment on the Reliability Issues of pMOSFETs with HfO2/SiON Gate Stacks
title_short Effects of Post-Deposition N2O Plasma Treatment on the Reliability Issues of pMOSFETs with HfO2/SiON Gate Stacks
title_full Effects of Post-Deposition N2O Plasma Treatment on the Reliability Issues of pMOSFETs with HfO2/SiON Gate Stacks
title_fullStr Effects of Post-Deposition N2O Plasma Treatment on the Reliability Issues of pMOSFETs with HfO2/SiON Gate Stacks
title_full_unstemmed Effects of Post-Deposition N2O Plasma Treatment on the Reliability Issues of pMOSFETs with HfO2/SiON Gate Stacks
title_sort effects of post-deposition n2o plasma treatment on the reliability issues of pmosfets with hfo2/sion gate stacks
publishDate 2005
url http://ndltd.ncl.edu.tw/handle/87974793430070770445
work_keys_str_mv AT tsungchiehlee effectsofpostdepositionn2oplasmatreatmentonthereliabilityissuesofpmosfetswithhfo2siongatestacks
AT lǐcōngjié effectsofpostdepositionn2oplasmatreatmentonthereliabilityissuesofpmosfetswithhfo2siongatestacks
AT tsungchiehlee hòuchénjīzhīyīyǎnghuàèrdànqìtǐdiànjiāngchùlǐduìèryǎnghuàjiāduīdiéshìzhájíjīnyǎngbànchǎngxiàodiànjīngtǐdiànxìngzhīyǐngxiǎng
AT lǐcōngjié hòuchénjīzhīyīyǎnghuàèrdànqìtǐdiànjiāngchùlǐduìèryǎnghuàjiāduīdiéshìzhájíjīnyǎngbànchǎngxiàodiànjīngtǐdiànxìngzhīyǐngxiǎng
_version_ 1718294479057715200