Effects of Post-Deposition N2O Plasma Treatment on the Reliability Issues of pMOSFETs with HfO2/SiON Gate Stacks

碩士 === 國立交通大學 === 電子工程系所 === 93 === With aggressive device scaling, shrinking the conventional thin silicon dioxide gate dielectric to the range of 2nm has caused an unbearable direct tunneling leakage current. To solve the problem, it is necessary to replace SiO2 by some high-k dielectric materials...

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Bibliographic Details
Main Authors: Tsung-Chieh Lee, 李聰杰
Other Authors: Tiao-Yaun Huang
Format: Others
Language:en_US
Published: 2005
Online Access:http://ndltd.ncl.edu.tw/handle/87974793430070770445
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Summary:碩士 === 國立交通大學 === 電子工程系所 === 93 === With aggressive device scaling, shrinking the conventional thin silicon dioxide gate dielectric to the range of 2nm has caused an unbearable direct tunneling leakage current. To solve the problem, it is necessary to replace SiO2 by some high-k dielectric materials such as HfO2. However, there are many outstanding issues in high-k materials, such as high interface state densities, large amounts of bulk traps, etc. In this thesis, we try to use post-deposition N2O plasma nitridation to improve the HfO2 film quality. We found that N2O plasma nitridation brings about many advantages such as reduced gate leakage current, increased Gm peak value, better subthreshold swing, reduced interface states and bulk traps in the HfO2. The dominant current transport mechanism in HfO2 gate dielectric is of the Frenkel-Poole type, and the electron traps are located at a deeper energy position after N2O plasma nitridation. Also, the preponderant trapping behaviors become electron-trapping dominant, rather than hole-trapping dominant, after N2O plasma nitridation. Under the constant voltage stress (CVS) and negative bias temperature instability (NBTI), we found that bulk traps in HfO2, rather than interface state densities, are responsible for the transistor degradation. Under dynamic stress, both the off-time de-trapping and the lack of hole trapping due to short on-time are required to explain the behavior of threshold voltage degradation. Finally, through the help of carrier separation experiments, we have clarified whether the breakdown originates in the bulk or the interfacial layer.