Dual Work Function Metal Gate Technology Using Fully Molybdenum Silicidation

• Main Authors: Ho, Wu-Ling, 何武陵
• Other Authors: Chun-Yen Chang
• Format: Others
• Language: en_US
• Published: 2005
• Online Access: http://ndltd.ncl.edu.tw/handle/04862784810924629968

碩士 === 國立交通大學 === 電子工程系所 === 93 === We propose a new schematic structure for gate electrode to fabricate the CMOS device. That is using pure Mo and Mo-silicide gate for pMOS and nMOS device, respectively. That can eliminate the boron penetration, and provide excellent thermal stability up to 950 ℃. First, we investigated the work function adjustability of fully Mo-silicide films and the thermal stability of gate dielectric and equivalent oxide thickness of Mo-silicide MOS devices. The molybdenum and amorphous silicon were deposited by sputtering system in Ar ambient. Samples with metal/SiO2/Si-sub MOS structures annealed at different temperature in RTA (rapid thermal anneal) system in N2 ambient were used to analyze the thermal stability of the flat-band voltage and equivalent oxide thickness. Using the same process condition, the molybdenum and amorphous silicon were deposited on HfO2 high-k Dielectric that deposited by MOCVD system. Investigating the work function adjustability and thermal stability of gate dielectric. The work function of the Molybdenum silicide on SiO2 dielectric decreased from 4.78 eV to 4.39 eV as anneal temperature increased to 800℃ 30s. And on the aspect of the molybdenum silicidation on HfO2 high-k dielectric, the work function was decrease from 4.81 eV to 4.34 eV as anneal temperature increase to 800℃ 30s. The work function of the molybdenum silicide has not seen obvious fermi pinning effect. This may be due to fermi pinning level very close to 4.34 eV. After that, using arsenic ion implantation to add arsenic to gate of MOS structure, to cause the work function of the gate on SiO2 dielectric decrease to 4.001 eV. And the work function of the gate on HfO2 high-k dielectric decrease to 4.16 eV. To investigate the thermal stability of gate oxide and equivalent oxide thickness, the samples were annealed by RTA system from 600 ℃ to 950 ℃, and found that no matter what metal silicide on SiO2 or HfO2 dielectric, the deviation of the metal work function and equivalent oxide thickness annealed among 800℃ and 950℃ can be neglect. Suggesting the molybdenum silicide metal gate can replace the traditional n+ poly-Si gate. The work function of pure Mo on SiO2 and HfO2 is about 4.931 eV and 4.906 eV, respectively. That is very close to the valance band of silicon. The deviation of the metal work function and equivalent oxide thickness annealed up to 950 ℃ can be neglect. Based on these results, Mo-silicide gate for nMOS and pure Mo gate for pMOS may chose for CMOS device fabrication.